Now that the basic HP5508A replacement is done, we can implement some performance improvements. Other than oversampling and phase estimation (later), the most straight forward thing to do is to increase the clock rate of the system. The standard clock rate set by UECIDE is 40 Mhz, but the chips are good to 50 Mhz up to a temperature of 85 C and probably even a little more.
Lets see how UECIDE sets the configuration bits for the oscillator. One very important thing to keep in mind is that the USB oscillator has to be 48Mhz to function.
Under AppData\Local\UECIDE\cores\chipkit\pic32 we can see in the file chipKIT-application-32MX250F128-nobootloader.ld that the configuration bits are set to:
SECTIONS{ .config_BFC00BF0 : { LONG(0xCFFFFFFF) } > config3 .config_BFC00BF4 : { LONG(0xFFF979D9) } > config2 .config_BFC00BF8 : { LONG(0xFF6A0D7B) } > config1 .config_BFC00BFC : { LONG(0x7FFFFFFB) } > config0}From the datasheet for the PIC32MX250F128B we can determine what these settings mean:
http://ww1.microchip.com/downloads/en/DeviceDoc/60001168H.pdf
Relevant here are the following bits:
config1 => FF6A0D7B => 111111 11 0 1 1 01010 00 00 1 1 01 0 1 1 11 011FNOSC<2:0>Oscillator Selection bits => 011 = Primary Oscillator (POSC) with PLL module (XT+PLL, HS+PLL, EC+PLL)FSOSCEN:Secondary Oscillator Enable bit => 1 = Enable Secondary OscillatorPOSCMOD<1:0>:Primary Oscillator Configuration bits => 01 = XT Oscillator mode selectedFPBDIV<1:0>:Peripheral Bus Clock Divisor Default Value bits => 00 = PBCLK is SYSCLK divided by 1FCKSM<1:0>:Clock Switching and Monitor Selection Configuration bits => 00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabledconfig2 => FFF979D9 => 1111111111111 001 0 1111 001 1 101 1 001FPLLODIV<2:0>:Default PLL Output Divisor bits => 001 = PLL output divided by 2UPLLEN:USB PLL Enable bit => 0= Enable USB PLLUPLLIDIV<2:0>:USB PLL Input Divider bits => 001 = 2x dividerFPLLMUL<2:0>:PLL Multiplier bits => 101 = 20x multiplierFPLLIDIV<2:0>:PLL Input Divider bits => 001 = 2x divider
That means that
SYSCLK=(8MHz Crystal/FPLLIDIV*FPLLMUL/FPLLODIV) = (8MHz Crystal/ 2 * 20 / 2) = 40 Mhz
As expected. The PLL Input Divider has to be chosen so that it delivers between 4MHz and 5MHz to the PLL. That means we are stuck with FPLLIDIV = 2.
Here are the available options for the two remaining parameters:
FPLLMUL:111= 24x multiplier110= 21x multiplier101= 20x multiplier100= 19x multiplier011= 18x multiplier010= 17x multiplier001= 16x multiplier000= 15x multiplierFPLLODIV:111= PLL output divided by 256110= PLL output divided by 64101= PLL output divided by 32100= PLL output divided by 16011= PLL output divided by 8010= PLL output divided by 4001= PLL output divided by 2000= PLL output divided by 1So we can easily change the system clock to 48 Mhz by changing FPLLMUL to 24.
SYSCLK=(8MHz Crystal/FPLLIDIV*FPLLMUL/FPLLODIV) = (8MHz Crystal/ 2 * 24 / 2) = 48 Mhz
The plib library we have included with plib.h already includes a function to do this. The function prototype to change the clock at runtime looks like this:
void OSCConfig (unsigned long int source, unsigned long int mult, unsigned long int post, unsigned long int div);details on what the individual parameters mean are available on microchips site:
http://microchip.wikidot.com/32bit:mx-oscconfig-plib
So we can just insert the clock change at the beginning of the setup routine:
void setup() { OSCConfig (OSC_POSC_PLL,OSC_PLL_MULT_24,OSC_PLL_POST_2,OSC_FRC_POST_2); // 48Mhz ...For an easy 20% improvement in performance just by changing the FPLLMUL multiplier from 20 to 24!
To make this compatible with the GUI, a new message is required to let it know that we don't run at the same clock frequency of 610.35Hz:
0-99: GUI Data/Control: 0: No Data 1: Laser Power 2: Signal Strength 3: Temperature 1 ( in percent, so 2345 is 23.45 degrees) 4: Temperature 2 ( in percent, so 2345 is 23.45 degrees) 5: Pressure ( in pascal ) 6: Humidity ( in tens of percent, so 234 is 23.4 percent humidity) 7: Data Source ID8: Sample Frequency (in hundreds of Herts, so 12345 is 123.45 Hz )(Not all of these are currently implemented.)